1. Field of the Invention
The invention relates to a semiconductor device having metal gate and manufacturing method thereof, and more particularly, to a semiconductor device having metal gate and manufacturing method integrated with the gate last process.
2. Description of the Prior Art
With a trend toward scaling down the size of the semiconductor device, work function metals are used to replace the conventional polysilicon gate to be the control electrode that competent to the high dielectric constant (high-K) gate dielectric layer. The conventional dual metal gate methods are categorized into the gate first process and the gate last process. Among the two main processes, the gate last process is able to avoid processes of high thermal budget and to provide wider material choices for the high-K gate dielectric layer and the metal gate, and thus the gate last process gradually replaces the gate first process.
In the conventional gate last process, a dummy gate or a replacement gate is formed on a substrate and followed by steps of forming a conventional metal-oxide semiconductor (MOS) transistor device. Subsequently, the dummy/replacement gate is removed to form a gate trench. Then the gate trench is filled with work function metals required by different conductivity type. However, the gate last process still faces requirements to the process integration and to the material formation result. For example, when removing the unnecessary work function metal layer from the semiconductor device having the complementary conductivity type, and when removing overhangs that always formed at openings of the gate trenches, etching processes severely damages the dielectric material, particularly the inter layer dielectric (ILD) layer. Accordingly, a recess or a seam is formed in the ILD layer. More important, the following formed metal materials will fill up the recess or the seam in the ILD layer and those metals filling in the recess or the seam cannot be removed by the planarization process, thus cause remnant metal defect. It is found the remnant metal defect is more serious at the boundary between the work function metal layers having complementary conductivity types.
Accordingly, though the gate last process is able to avoid processes of high thermal budget and to provide more material choices for the high-K gate dielectric layer and the metal gate, the gate last process still faces integrity requirements for the complicated processes, reliability requirement for the layers filling in the gate trench, and needs solution for the remnant metal defects.